Description

Location- Bangalore/Hyderabad.

Exp- 4+yrs

JD-You should be strong with SoC level Clock and Reset, low power design, UPF, CDC/RDC/LINT, DFT, repeaters, top level integration of connectivity, system bus, peripherals and ARM.

 

Key Skills

Design Low-power Design RTL Design

Education

Any Graduate

  • Posted On: Few Days Ago
  • Experience: 4+
  • Openings: 1
  • Category: Design Engineer
  • Tenure: Any