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AMS Verification Engineer

UST

 

Hanoi, Hanoi, Vietnam

Posted On: 30+ days ago
Experience: 3+ years
Availability: Hybrid
Openings: 1
Category: AMS Verification
Tenure: No Preference/Any
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Description

Perform mixed-signal verification for USB PD controller IP.

Responsibilities

  • Develop AMS test plans, checkers, and SV assertions.
  • Build behavioral models for analog blocks using Verilog, Verilog-A, or Verilog-AMS.
  • Drive functional coverage closure.
  • Integrate spice netlists and debug AMS simulations.
  • Collaborate with Analog, RTL, and DV teams to implement system-level scenarios in AMS environments.

Required Skills

  • 3+ years of experience in Analog & mixed signal verification.
  • Proficiency in Verilog, Verilog-A, and Verilog-AMS for behavioral modeling.
  • Experience with EDA tools such as Cadence Xcelium and APS/XPS, or Synopsys VCS/CustomSim, or Siemens Questa/Eldo.
  • Knowledge of analog blocks including BGR, comparator, op-amp, current mirror, charge pump, ADC, and regulator.
  • Ability to implement testbench components, assertions, and coverage metrics.
  • B.E/B.Tech in ECE or EE, or M.E/M.Tech/MS in Microelectronics, VLSI Design, Integrated Circuits, or SoC.

Education

Any Graduate

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