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AMS Verification Engineer

UST

 

Hanoi, Hanoi, Vietnam

Posted On: 3 days ago
Experience: 3+ years
Availability: Onsite
Openings: 1
Category: AMS Verification
Tenure: No Preference/Any
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Description

You will perform mixed-signal verification for USB PD controller IP, owning test plans, checkers, and SV assertions. You will build behavioral models for analog blocks and drive functional coverage closure.

This role is on-site.

Responsibilities

  • Develop AMS test plans, checkers, and SV assertions for USB PD controllers.
  • Build behavioral models for analog blocks using Verilog, Verilog-A, or Verilog-AMS.
  • Integrate spice netlists and debug AMS simulations to ensure correctness.
  • Drive functional coverage closure and implement system-level scenarios in AMS environments.
  • Collaborate with Analog, RTL, and DV teams to validate system-level behavior.

Required Skills

  • 3+ years of experience in Analog & mixed signal verification.
  • Proficiency in Verilog, Verilog-A, and Verilog-AMS for behavioral modeling.
  • Experience with EDA tools such as Cadence Xcelium and APS/XPS, Synopsys VCS/CustomSim, or Siemens Questa/Eldo.
  • Knowledge of analog blocks including BGR, comparator, op-amp, current mirror, charge pump, ADC, and regulator.
  • Ability to implement testbench components, assertions, and coverage metrics.
  • B.E/B.Tech in ECE or EE, or M.E/M.Tech/MS in Microelectronics, VLSI Design, Integrated Circuits, or SoC.

Education

Any Graduate

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