Description

You will design and integrate digital hardware blocks for high-performance networking SOCs, focusing on embedded software for a state Linux platform and low-power architectures.

Responsibilities

• Execute RTL design, synthesis, static-timing closure, formal verification, and gate-level simulations.
• Develop synthesizable digital logic using SystemVerilog and Verilog for ASIC/SOC micro-architecture.
• Implement high-performance and low-power design principles for networking hardware blocks.
• Integrate hardware blocks with embedded software components on the state Linux platform.

Required Skills

• 5+ years of RTL development experience with SystemVerilog and Verilog.
• Hands-on experience with PCIe, CXL, AXI, and Ethernet interfaces.
• Knowledge of industry-standard bus interfaces including SPI, SRIO, USB, and XAUI.
• Experience with memory interfaces such as DDR2 and DDR3.
• Proficiency in FPGA emulation for verification and debugging.
• B.S. or M.S. in Electrical Engineering or a related field.

Preferred Skills

• Prior experience working with Ethernet NIC or Switch ASICs.
• Design knowledge of NIC/Switch architecture and Ethernet MAC design.

Key Skills

Education

Any Graduate