Description

You will develop and implement ASIC emulation plans for SoC designs. You will own the validation of hardware and software integration by collaborating with cross-functional teams. Your work includes debugging issues within the emulation environment, optimizing performance and coverage, and providing feedback to design and verification teams to improve design quality.

Responsibilities

• Develop and implement emulation plans for SoC designs.
• Collaborate with cross-functional teams to validate hardware and software integration.
• Debug and resolve issues within the emulation environment.
• Optimize emulation performance and coverage.
• Provide feedback to design and verification teams to improve design quality.

Required Skills

• 5+ years of experience in ASIC emulation or similar roles.
• Strong knowledge of SoC architecture, RTL design, and verification.
• Proficiency in Verilog and SystemVerilog.
• Experience with FPGA-based emulation platforms such as Synopsys or Cadence.
• Experience with RTL design.
• Proficiency in scripting languages.
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Key Skills

Education

Any Graduate