Description

You will design and verify complex digital designs.

This role is hybrid.

Responsibilities

• Verify complex digital designs using advanced methodologies.
• Apply RTL and synthesis concepts during the verification process.
• Collaborate on design implementation and validation.
• Develop and maintain verification environments.
• Document verification results and design changes.

Required Skills

• 5+ years of professional Design Verification experience.
• Expertise in RTL and Synthesis processes.
• Proficiency with SystemVerilog and UVM.
• Strong scripting capabilities in Python, Perl, or C/C++.
• Understanding of digital logic design principles.
• Ability to debug complex hardware issues.

Key Skills

Education

Any Graduate