Description

You will drive functional verification efforts for complex processor architectures and digital designs.

Responsibilities

• Develop and maintain functional verification tests using UVM at the subsystem level.
• Build testbench components to support next-generation IP.
• Maintain and improve current test libraries for IP-level testing.
• Lead technical efforts for IPs in Control Fabric.
• Provide technical support to cross-functional teams.

Required Skills

• 5+ years of experience in design verification.
• Proficiency in SystemVerilog and UVM.
• Strong programming skills in C and C++.
• Experience with AXI protocol and Bootcode Verification.
• Scripting knowledge in Perl, Ruby, and Makefile.
• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

Key Skills

Education

Any Graduate