Description

You will own the implementation and validation of design-for-testability features for semiconductor products.

This role is on-site.

Responsibilities

• Implement hardware Memory BIST (MBIST) features for ATE and in-system testing.
• Collaborate with design, verification, and backend teams to integrate test logic.
• Design and debug test solutions independently, ensuring quality pattern generation for production.
• Support silicon bring-up, characterization, and yield improvement activities.
• Execute gate-level simulations and debug test flows.

Required Skills

• 9-13 years of experience in DFT, MBIST, and semiconductor test methodologies.
• Hands-on experience in scan insertion and JTAG implementation.
• Proficiency with SystemVerilog and UVM for verification.
• Experience with ATPG and MBIST implementation.
• Expertise in Python or Perl for developing automation scripts.
• Familiarity with ATE environments and production test flows.
• Knowledge of post-silicon validation and yield improvement processes.

Preferred Skills

• Experience with VCS or equivalent simulators.

Key Skills

Education

Any Graduate