Description

You will own verification tasks for DDR and LPDDR projects, leading technical efforts and training junior engineers.

This role is on-site.

Responsibilities

• Lead and train junior engineers on design verification practices.
• Own DV tasks requiring hands-on UVM knowledge.
• Dive deep into DDR and LPDDR protocols.
• Travel to customer locations as required.

Required Skills

• 5+ years of professional experience in design verification.
• Hands-on experience with UVM.
• Expertise in DDR protocol.
• Experience with LPDDR protocol.
• Demonstrated ability to lead technical efforts.
• Bachelor of Computer Science degree.

Key Skills

Education

Bachelor of computer science