Description

• Exposure to Emulation model build and sanity bring up
• Proven Emulation Test bench bring up experience with C++ and System verilog BFM models is a must
• Porting C++/System Verilog Simulation Test bench to Emulation expertise is a must
• Hands on testbench bring up for System verilog, C++ based testbenches
• BFM coding using C++ or System verilog
• Strong Python scripting skills
• Exposure to GPU emulation model build and sanity bring up
• Good Architecture GPU understanding
• Strong Functional verification expertise.
• B. Tech + 12 Years. Mtech + 10 Years ( ECE, VLSI)
• Bachelors or Masters degree in Electronics and communication Engineering

Experience: 10+ Years

Key Skills

Education

Any Graduate