Description

You will manage the end-to-end FPGA design lifecycle from initial RTL development to hardware bring-up.

Responsibilities

• Execute full FPGA design cycles including RTL coding, simulation, and implementation.
• Perform hands-on hardware bring-up and debugging tasks.
• Conduct board-level testing using oscilloscopes and logic analyzers.
• Collaborate on compute and systems development to build advanced technology products.

Required Skills

• 8+ years of end-to-end FPGA design experience.
• Proficiency in Verilog and SystemVerilog.
• Experience with commercial HDL simulators such as ModelSim or Questa.
• Strong background in digital circuit design.
• Hands-on experience with communication protocols including I2C, UART, SPI, I2S, USB, MIPI, and PCIe.
• Ability to use hardware debugging tools like oscilloscopes and logic analyzers.
• BS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.

Key Skills

Education

Any Gradute