Description

You will own the verification process for complex FPGA designs.

Responsibilities

• Develop and execute comprehensive verification plans for FPGA designs.
• Create and maintain test benches using industry-standard verification methodologies.
• Write and debug test cases to verify functionality, performance, and corner cases.
• Perform code coverage and functional coverage analysis.
• Identify and debug issues, collaborating with design engineers for resolution.

Required Skills

• Strong understanding of FPGA design principles and architectures.
• Proficiency in SystemVerilog and UVM verification methodology.
• Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
• Knowledge of code coverage and functional coverage analysis.
• Experience with scripting languages, specifically Python and Perl.
• Familiarity with hardware description languages such as VHDL and Verilog.

Key Skills

Education

Any Graduate