Description

You will own the verification process for complex FPGA designs.

This role is on-site.

Responsibilities

• Develop and execute verification plans for FPGA designs.
• Create and maintain test benches using industry-standard methodologies.
• Write and debug test cases to verify functionality, performance, and corner cases.
• Perform code coverage and functional coverage analysis.
• Identify and debug issues, collaborating with design engineers for resolution.

Required Skills

• 5+ years of experience in FPGA verification.
• Strong understanding of FPGA design principles and architectures.
• Proficiency in SystemVerilog and UVM verification methodology.
• Experience with QuestaSim, Synopsys VCS, or similar tools.
• Proficiency in Python and Perl scripting.
• Familiarity with VHDL and Verilog.
• Any Graduate degree.

Key Skills

Education

Any Graduate