Description

Lead Design for Test (DFT) efforts focusing on architecture and silicon debug.

You will own the DFT strategy, from architecture design through to silicon validation.

Responsibilities

• Design and implement DFT architecture for complex silicon designs.
• Execute Scan and MBIST strategies to ensure high test coverage.
• Manage ATPG flows and verification processes.
• Perform silicon debug to identify and resolve hardware issues.

Required Skills

• 6+ years of experience in DFT engineering.
• Deep expertise in DFT architecture design.
• Hands-on experience with Scan and MBIST implementation.
• Proficiency in ATPG development and analysis.
• Proven track record in silicon debug.
• Bachelor's degree or equivalent graduate qualification.

Key Skills

Education

Any Graduate