Description

You will design and develop hardware for Large Language Model applications.

Responsibilities

• Execute front-end hardware design tasks using Verilog and SystemVerilog.
• Develop and implement verification workflows to ensure design integrity.
• Manage hardware integrations and address complex technical problems.
• Write scripting code to automate design and verification processes.

Required Skills

• 5+ years of professional experience in hardware design.
• Proficiency in Verilog and SystemVerilog.
• Experience with VHDL.
• Strong scripting skills for design automation.
• Knowledge of Machine Learning (ML) and AI hardware requirements.
• Experience with SystemC and hardware integration.
• Bachelor's degree or equivalent graduate qualification.

Key Skills

Education

Any Gradutate