Description

You will work on deep sub-micron IC logic, VLSI, ASIC, and custom design for PROM IP across mobile, IoT, client, network, and server segments.

Responsibilities

• Perform floor planning, power planning, and placement of digital and analog blocks.
• Execute physical design validation including static timing and noise analysis.
• Conduct power grid characterization and analysis using industry standard tools.
• Troubleshoot physical design issues and implement necessary design changes.
• Collaborate with DRC/LVS teams to ensure designs meet manufacturing requirements.
• Automate design processes and perform quality analysis of design collateral.

Required Skills

• 3+ years of experience in VLSI Design.
• Proficiency with Cadence Virtuoso, HSPICE, and ADE.
• Experience building custom digital blocks using Cadence Virtuoso.
• Working knowledge of physical design methodologies and tools including Primetime, StarRC, and Redhawk.
• Scripting experience with Python, TCL, or Perl for automation.
• Strong understanding of VLSI, ASIC, and Circuit Design.
• Bachelor’s degree in Electrical Engineering with 3+ years of experience, or a Master’s degree in Electrical Engineering or a related field with 2+ years of experience.

Key Skills

Education

Any Graduate