Description

You perform static and dynamic IR drop and electromigration analysis at block, subsystem, and SoC levels to ensure reliability signoff.

This role is remote.

Responsibilities

• Analyze and close Power EM and Signal EM violations according to foundry reliability rules.
• Support PDN design and optimization, including mesh, strap, and via enhancement recommendations.
• Run thermal analysis and correlate power, timing, and reliability results for clean signoff.
• Collaborate with Physical Design teams during floorplanning, power planning, and routing.
• Support silicon bring-up and late-stage signoff escalations for power-related issues.

Required Skills

• 5+ years of experience in power integrity, EM/IR analysis, and reliability signoff for ASIC/SoC designs.
• Hands-on experience with Voltus, Cadence RedHawk, RedHawk-SC, Totem, and PTPX.
• Ability to interpret rail drop, current density, hotspots, and reliability metrics to drive closure.
• Physical design awareness and integration with ICC2 and Fusion Compiler for power planning and routing context.
• Experience supporting signoff workflows and late-stage correlation.
• Scripting experience with Python and Shell for automation and analysis support.
• Proficiency in Tcl for analysis and tool interaction.

Preferred Skills

• Experience with Innovus and PrimeTime for broader design and timing correlation workflows.
• Depth in RedHawk Thermal for thermal analysis and reporting.

Key Skills

Education

Any Graduate