Description

You will own the power design and verification cycle for hardware IP blocks.

This role is on-site.

Responsibilities

• Run power tests on RTL designs and verify test behavior against design intent.
• Utilize PPRTL or PTPX to profile hardware designs and identify power-intensive areas for optimization.
• Correlate hardware events and telemetry with power profiles to understand consumption.
• Develop Python and/or TCL scripts to automate data extraction and process large hardware design datasets.
• Analyze profiling data, generate reports, and provide power reduction recommendations to design teams.

Required Skills

• 5+ years of experience in RTL design and verification principles.
• Demonstrated experience with power profiling tools such as PPRTL or PTPX.
• Proficiency in Python and/or TCL for automation and data manipulation.
• Ability to process and analyze large datasets related to hardware design.
• Experience building runtime power models using ML techniques.
• Strong background in hardware design and verification.

Key Skills

Education

Any Gradute