Description

You will lead the RTL design and implementation of complex ASIC products and SoCs.

Responsibilities

• Own the RTL design process for complex ASIC products and SoCs using Verilog or SystemVerilog.
• Drive the development of Automotive IP or SoC from initial definition through to completion.
• Implement power domain and clock domain crossing strategies.
• Execute static design checks, synthesis, and timing analysis.
• Lead, mentor, and coach technical team members.

Required Skills

• 5+ years of experience in RTL design for complex ASIC products and SoCs.
• Proficiency in Verilog and/or SystemVerilog.
• Experience with Arm-based designs or Arm System Architectures.
• Applied knowledge of Functional Safety standards such as ISO 26262 or IEC 61508.
• Practical experience with processor-based system designs and computer architecture fundamentals.
• Competency in power management techniques.
• Scripting skills in Tcl, Perl, or Python.
• Any Graduate degree.

Preferred Skills

• High-level programming experience in C, C++, or assembly language.
• Experience with embedded operating systems, device drivers, microprocessors, and embedded system hardware architectures.
• Knowledge of performing DFMEA and DFA at the module and system level.

Key Skills

Education

Any Graduate