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Principal Verification Engineer

Hays

 

Sheffield, United Kingdom

Posted On: 2 days ago
Experience: 5+ years
Availability: Hybrid
Openings: 1
Category: Verification Engineer
Tenure: No Preference/Any
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Description

You will lead functional verification for processor-based system designs, covering the full lifecycle from requirements to documentation.

This role is on-site.

Responsibilities

  • Write test plans and define verification methodologies to meet quality and schedule targets.
  • Own verification progress and coordinate with project management on schedules and checkpoints.
  • Collaborate with architecture, design, modelling, performance analysis, silicon validation, FPGA, and board development teams.
  • Mentor junior engineers within the verification team.

Required Skills

  • 5+ years of experience in embedded C/C++ based SoC verification environments.
  • Proficiency in SystemVerilog and assembly language, preferably ARM.
  • Experience with verification methodologies such as UVM, formal, low power, or emulation.
  • Skill in shell programming and scripting using Python, Perl, or Tcl.
  • Hands-on experience with testbench implementation, test case development, and test plan creation.
  • Proven ability to communicate complex technical concepts to technical teams, partners, and customers.
  • Practical experience verifying processor-based system designs.

Preferred Skills

  • Understanding of Arm system architectures and power-aware or Clock Domain Crossing implementation.
  • Experience with embedded operating systems, device drivers, or microprocessor hardware architectures.
  • Verification of subsystems for PCIe, LPDDR, HBM, UCIe, or Ethernet.
Education

Any Graduate

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