Description

You will design and verify digital circuits using RTL coding methodologies.

This role is on-site.

Responsibilities

• Implement digital designs using Verilog and SystemVerilog.
• Write and debug RTL code for synthesis and simulation.
• Perform basic simulation to validate design functionality.
• Apply digital design fundamentals to create efficient hardware structures.

Required Skills

• 5+ years of experience in digital design.
• Proficiency in Verilog and SystemVerilog.
• Strong understanding of RTL coding basics.
• Knowledge of digital design fundamentals.
• Experience with basic simulation techniques.

Preferred Skills

• Any Graduate degree in Engineering or related field.

Key Skills

Education

Any Graduate