Description

Define micro-architecture and execute RTL design for complex silicon IP solutions, including PCIe, NVMe, and Ethernet controllers.

This role is on-site.

Responsibilities

• Define micro-architecture from high-level definitions for complex IP solutions.
• Perform RTL design, IP integration, and generate comprehensive technical documentation.
• Act as a senior technical reviewer for architecture, implementation, and verification plans.
• Develop comprehensive testing plans, including compliance and interoperability testing with stakeholders.
• Mentor junior engineers and lead cross-functional collaboration.

Required Skills

• 8+ years of experience in silicon IP development and RTL design.
• Strong proficiency in Verilog and VCS simulation tools.
• Experience with PCIe, DMA, NVMe, Ethernet, TCP/IP, and RDMA protocols.
• Scripting skills in Perl.
• Bachelor’s or Master’s degree in Electrical Engineering or Computer Science.

Preferred Skills

• Experience with Design for Test (DFT) methodologies and complex silicon tapeouts.
• Strong analytical, problem-solving, and leadership abilities.

Key Skills

Education

Any Graduate