Description

You will design and develop analog and mixed-signal CMOS circuits for high-speed interfaces and SoC sub-blocks.

This role is on-site.

Responsibilities

• Design analog/mixed-signal CMOS circuits for high-speed memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6).
• Develop high-speed analog/mixed-signal blocks for SerDes PHYs, including Rx, CDR, DFE, PI, Tx, PLL, LDO, and comparators.
• Engineer analog building blocks such as OpAmps, Bandgap References, Charge pumps, and bias generators.
• Implement HBM2E SoC analog sub-blocks including DLL, PLL, HBMIO, and Clktree.

Required Skills

• 5+ years of experience in analog or mixed-signal CMOS circuit design.
• Proficiency in Mixed-Signal Integrated Circuits design.
• Hands-on expertise with Phase-Locked Loop (PLL) design.
• Experience with high-speed memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6).
• Experience with SerDes interfaces such as PCIe, MIPI, HDMI, USB, or SATA.
• Technical knowledge of SerDes architecture and high-speed signaling.
• Experience with CMOS technology nodes.

Key Skills

Education

Any Graduate