Description

You will lead verification efforts for ARM-based SoCs, focusing on complex debug and architectural validation.

Responsibilities

• Develop and maintain C-based testbenches and SystemVerilog environments.
• Verify SoC functionality using AXI and AHB protocols.
• Execute debugging tasks across simulation and gate-level simulations (GLS).
• Validate reset architecture and dynamic frequency scaling implementations.
• Perform CDC verification to ensure clock domain integrity.

Required Skills

• 7+ years of experience in design verification.
• Expertise in SystemVerilog and UVM.
• Hands-on experience with C-based testbenches.
• Deep understanding of ARM-based SoC verification.
• Proficiency with AXI and AHB protocols.
• Strong debugging skills in simulation environments.
• Experience with CDC verification.
• Ability to debug reset architecture and dynamic frequency scaling in GLS.

Preferred Skills

• Experience with Coresight and JasperGold.

Key Skills

Education

Any Graduate