Description

You will own the verification process for secure, cost-sensitive FPGA products from initial architecture through to production release.

Responsibilities

• Analyze system requirements to develop and execute comprehensive test plans.
• Build and maintain scalable simulation environments from the ground up using SystemVerilog and UVM.
• Define verification methodologies for complex FPGA designs.
• Monitor and analyze code coverage, functional coverage, and assertions to ensure design integrity.
• Collaborate with cross-functional teams to manage changing requirements and design needs.

Required Skills

• 5+ years of experience in FPGA or ASIC design verification.
• Expertise in SystemVerilog and UVM/OVM methodologies.
• Proficiency in VHDL or similar hardware description languages.
• Strong scripting skills in Python, Perl, TCL, or Bash/csh.
• Experience setting up simulation environments and managing complex test suites.
• Ability to implement and verify assertions and functional coverage.
• Bachelor's degree or equivalent graduate-level education.

Preferred Skills

• Experience with Xilinx FPGA architectures.
• Familiarity with Questa Advanced Functional Verification tools.

Key Skills

Education

Any Gradute