Description

Lead end-to-end hardware design for high-power, high-density Ethernet switches in AI networks and hyperscale datacenters.

Responsibilities

• Author functional specifications and select/qualify components for 100G/200G PAM4 Ethernet switching.
• Execute schematic capture using flat and hierarchical methods.
• Collaborate with eCAD teams on PCB layout, footprints, and stackup specifications.
• Perform signal and power integrity simulations on datapath and power signals.
• Manage hardware bring-up, prototype debugging, and manufacturing processes from concept to mass production.

Required Skills

• 10+ years of hardware engineering experience.
• Design of 20+ layer boards with 50G+ signals using HDI and ultra-low-loss materials.
• Expertise in high-speed interfaces including DDR and PCIe.
• Experience with multi-phase DC/DC converters for high current and transient loads.
• Strong understanding of signal integrity and power integrity (impedance, PDN, differential routing, S-parameters, TDR, VNA).
• Proficiency in Verilog for FPGA design and system simulation.
• Experience with Design for Manufacturability (DFM).

Preferred Skills

• Embedded x86/ARM system design experience.

Key Skills

Education

Any Graduate