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CareerNet Technologies Pvt Ltd Logo
Senior Lead IP Design Engineer

CareerNet Technologies Pvt Ltd

 

Bangalore, Karnataka, India

Posted On: 7 days ago
Experience: 12+ years
Availability: Onsite
Openings: 1
Category: Design Engineer
Tenure: No Preference/Any
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Description

Define and implement the micro-architecture and RTL for Infinity Data Fabric components, including cache and coherency protocols, to meet SoC power, performance, and area targets.

This role is on-site.

Responsibilities

  • Lead digital design and micro-architecture of Data Fabric domains, delivering on complex technical requirements.
  • Define fabric features and capabilities aligned with SoC power, performance, and area (PPA) constraints.
  • Develop micro-architecture specifications and implement RTL coding in Verilog and SystemVerilog.
  • Collaborate with architects and design leads to assess and resolve complex technical issues throughout the project lifecycle.
  • Partner with verification and physical design teams to ensure quality component development and achieve PPA targets.

Required Skills

  • 12+ years of experience in RTL Design with a strong foundation in fabric/transport architecture and coherency protocols.
  • Proficiency in Verilog and SystemVerilog for RTL coding and micro-architecture development.
  • Experience with Infinity Data Fabric, fabric/transport architecture, and SoC requirements analysis.
  • Demonstrated expertise in memory design and cache design.
  • Ability to lead design work across one or more domains while managing deliverables.
  • Experience providing post-silicon support for bring-up and hardware troubleshooting.
  • Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

Preferred Skills

  • Experience working with architects and design leads on complex technical issues.
  • Strong collaboration skills with verification teams to ensure quality component development.

Education

Any Graduate

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