Description

Key Skills: UVM, SystemVerilog, RTL Design, ASIC Verification, C++, Verilog, C Programming, Graphics Pipeline, SystemC, Perl

Good to Have Skills: Ruby, Makefile, shell scripting, Linux and Windows environments, debugging firmware, simulation tools, HLS tools, video codec systems, multimedia solutions, leadership experience, mentorship capabilities. TLM experience and distributed compute environment automation are also valuable.

Roles & Responsibilities:

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests for graphics processor IP components
• Debug test failures to determine the root cause and work with RTL and firmware engineers to resolve design defects
• Review functional and code coverage metrics and modify or add tests to meet the coverage requirements

Experience Required: Proficient in IP level ASIC verification with strong debugging skills for firmware and RTL code using simulation tools. Experience with UVM testbenches in Linux and Windows environments is essential.

Education: Bachelors or Masters degree in Computer Engineering/Electrical Engineering

Key Skills

Education

Any Graduate