Description

Lead logic verification for control ASICs to enable successful tapeout.

This role is on-site.

Responsibilities

• Create comprehensive verification plans based on IP design specifications.
• Build standalone IP testbenches using SystemVerilog.
• Develop test cases, coverage models, and assertions to ensure functional correctness.
• Generate functional and code coverage metrics and collaborate with developers on IP completeness.
• Deliver functional test vectors required for post-silicon validation.

Required Skills

• 4+ years of hands-on experience in Logic IP Verification using SystemVerilog.
• Experience with UVM and SystemVerilog logic verification environments.
• Hands-on verification of silicon IPs such as UART, CAN-FD, I2C, SPI, QSPI, SD/UMMC, or General purpose timers/PWM.
• Understanding of ARM microcontroller architecture (specifically Cortex-M4) and debug infrastructure.
• Experience verifying ARM Cortex-M4 based subsystems/SOCs, including debug interfaces like SWD and SWJ.
• Ability to perform C-based and SystemVerilog based IP verification.
• Strong problem-solving, written, and verbal communication skills.

Preferred Skills

• Knowledge of cryptography algorithms and data encryption/decryption verification.
• Experience with Arm Boot processes.

Key Skills

Education

Any Graduate