Description

You will own the verification lifecycle for graphics processor IP features.

This role is on-site.

Responsibilities

• Collaborate with architects, hardware, and firmware engineers to define verification requirements for new features.
• Develop comprehensive test plan documentation covering feature interactions, hardware states, firmware, and driver use cases.
• Estimate effort for writing new feature tests and determining necessary changes to the test environment.
• Build directed and random verification tests for graphics processor IP using industry-standard methodologies.
• Debug test failures, determine root causes, and resolve design defects in collaboration with RTL and firmware engineers.

Required Skills

• 5+ years of senior-level experience in IP level ASIC verification.
• Proficiency in UVM testbenches and ASIC verification methodologies.
• Expertise in SystemVerilog, Verilog, and RTL design.
• Strong debugging skills for firmware and RTL code using simulation tools.
• Experience working in Linux and Windows environments.
• Familiarity with C++, SystemC, and Perl.
• Knowledge of Graphics Pipeline concepts.

Key Skills

Education

Any Graduate