Description

You will lead silicon verification efforts for SoCs and block-level designs. You own the testplan creation and UVM testbench development from scratch.

Responsibilities

• Develop UVM-based testbenches, including sequences, scoreboards, coverage models, and assertions.
• Write and review test plans to ensure comprehensive coverage of architecture specifications.
• Implement DPI calls for C reference models to verify design functionality.
• Develop UVM agents with monitors, drivers, and other components.
• Perform block-level and SoC-level debug independently.

Required Skills

• 5+ years of experience in silicon verification.
• Strong proficiency in UVM methodology.
• Experience verifying SoCs with knowledge of AMBA protocols.
• Ability to work independently and solve complex problems without handholding.
• Experience with DPI calls and C reference models.
• Any Graduate degree in engineering or related field.

Key Skills

Education

Any Graduate