Description

You will integrate IP and develop logic for complex compute subsystems and SoCs, owning the full design lifecycle from micro-architecture to delivery.

This role is on-site.

Responsibilities

• Write micro-architecture specifications and develop RTL in Verilog.
• Review subsystem architecture and create detailed design specifications.
• Debug design issues, run design checks, and evaluate subsystem performance.
• Collaborate with verification teams to review test plans and methodologies.
• Enhance design methodologies and support team members to meet project schedules.

Required Skills

• 5+ years of experience in the design of complex compute subsystems or SoCs.
• Strong knowledge of digital hardware design and Verilog HDL.
• Proficiency with Perl, Python, or other scripting languages.
• Experience creating detailed design specifications for complex SoC development.
• Bachelor's or Master's degree in Computer Science, Electrical/Computer Engineering, or a related field.

Preferred Skills

• Experience with ARM-based designs or ARM System Architectures.
• Knowledge of SystemVerilog and verification methodologies such as UVM, OVM, or e.
• Experience with synthesis, timing analysis, and static design checks (CDC, RDC, X-Propagation, Linting).

Key Skills

Education

Any Graduate