Description

Key Skills: C++, Python, SystemC, Performance Modeling, Computer Architecture, SoC Architecture, Cache Coherence, Virtual Memory, gem5, Machine Learning

Good to Have Skills: Post-silicon debug tools, hardware performance counters (ARM PMU, Intel VTune), PyTorch, TensorFlow, data visualization tools, NoC topologies, memory technologies (LPDDR5/6, HBM), ML frameworks compiling and mapping to specialized hardware accelerators.

Roles & Responsibilities:

• Leverage and maintain execution-driven and trace-driven SoC performance simulators using C++, SystemC, or Python.
• Construct scalable models to project the performance of future SoC configurations and validate architectural concepts before RTL freeze.
• Model the interaction between hardware subsystems and low-level software stacks to identify system-wide bottlenecks.
• Profile and analyze industry-standard benchmarks and real-world use cases across CPU, GPU, and Machine Learning/AI workloads.
• Capture and manipulate instruction and memory traces from both pre-silicon environments and post-silicon hardware.
• Evaluate Network-on-Chip (NoC) topologies, routing algorithms, arbitration schemes, and bandwidth/latency characteristics under heavy multi-master workloads.
• Analyze the impact of cache hierarchies, memory controllers, and various memory technologies on system performance.
• Evaluate complex trade-offs when scaling or configuring different combinations of CPU cores, GPU compute units, and ML accelerators.

Experience Required: 5+ years of industry experience in SoC/Processor architecture and performance modeling.

Education: BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or a related field

Key Skills

Education

Any Graduate