Description

You will lead SoC execution, mapping architectural specifications to implementation details and integrating key IPs.

This role is on-site.

Responsibilities

• Guide CWFs on SoC execution and implementation strategies.
• Map architectural specifications to detailed implementation requirements.
• Integrate PCIe and Ethernet IPs into the SoC design.
• Execute chip IO integration and perform design static checks including CDC, RDC, and CLP.

Required Skills

• 10+ years of experience in Logic (RTL) Design.
• Deep understanding of SoC architecture and ARM-based architectures.
• Hands-on experience with AMBA bus protocols (CHI, AXI, AHB, APB).
• Proven experience integrating PCIe and Ethernet IPs.
• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• Strong fundamentals in VLSI design and chip IO integration.

Preferred Skills

• Proficiency in scripting languages including Perl, TCL, and Python.
• Experience with peripheral bus IPs such as GPIO, UART, SPI, SW, JTAG, and I2C.
• Working knowledge of GIT.

Key Skills

Education

Bachelor's degree