Description

Key Skills: RTL Design, Verilog, Mixed-Signal Design, Analog & Digital Circuits, Digital Design, ASIC Design, FPGA Design, SystemVerilog, Python, Perl, Design Verification, Silicon Bring-up, Chip Debugging, Sensor Architecture.

Roles & Responsibilities:

• Translate sensor requirements into detailed specifications and develop sensor architecture to meet functional and performance requirements.
• Design digital architecture and develop RTL code for complex digital blocks with multiple operating modes.
• Execute end-to-end design activities including RTL development, simulation, and verification as per technical specifications and timelines.
• Participate in chip bring-up, lab debugging, and silicon validation using scripting and data analysis.
• Collaborate with cross-functional teams including verification, test engineering, and hardware teams for test development and characterization.
• Work with customers and stakeholders to communicate design specifications, status updates, and technical details.
• Create and maintain comprehensive design documentation, methodologies, and best practices.
• Participate in technical design reviews and contribute to continuous improvement of design processes.

Experience:

• 9 - 15 years of experience in Digital Design, ASIC Design, or Semiconductor product development.
• Strong hands-on experience in RTL design using Verilog/SystemVerilog.
• Experience in mixed-signal or analog-digital integrated systems is preferred.
• Exposure to FPGA design, silicon validation, and chip bring-up activities.
• Experience with scripting languages such as Python or Perl for automation and analysis.
• Proven experience working in semiconductor product lifecycle from design to silicon validation.

Education: Any Graduation

Key Skills

Education

Any Graduate