Description

You will build FPGA models for complex System-on-Chips.

Responsibilities

• Create FPGA-based models of ARM and DSP-based SOCs and complex intelligent Automotive Audio Bus ASICs.
• Perform system-level debugging for large, high-speed SOCs exceeding 30 million gates at 1 GHz+.
• Model very fast ASICs operating at 200+ MHz, focusing on timing closure.
• Write real-time embedded device driver test software to verify FPGA models.
• Collaborate with Chip, Verification, Hardware, Software, and Applications teams on projects.

Required Skills

• 8+ years of FPGA experience with expertise in RTL design.
• Proficiency in Fpga Design, Verilog, Vhdl, and Rtl.
• Experience with Timing Closure and Memory Modeling.
• Strong skills in Python and C/C++.
• Experience modeling ARM and DSP-based SOCs.
• Familiarity with ASIC modeling and system-level debugging.

Key Skills

Education

Any Graduate