Description

You will develop, test, and maintain high-performance functional models for system-level IP using C++ and SystemC.

This role is on-site.

Responsibilities

• Build and enhance virtual platforms to support early firmware, OS, and application development prior to silicon availability.
• Collaborate with hardware architects and RTL designers to ensure accurate behavioral modeling of IP specifications.
• Integrate multiple IP models into scalable system-level simulations and virtual platform environments.
• Support software bring-up activities and diagnose system-level issues using virtual platform environments.
• Optimize simulation performance and improve model efficiency to support large-scale system simulations.

Required Skills

• 12-15 years of experience in system-level modeling, SoC/IP modeling, or virtual platform development.
• Strong hands-on expertise in C++ for large-scale software systems and functional modeling.
• Experience with SystemC and TLM-based modeling and configuration methodologies.
• Strong understanding of computer architecture and microarchitecture concepts.
• Hands-on experience in debugging and testing complex system-level models and simulations.
• Experience with simulation performance tuning and model optimization techniques.
• Familiarity with Git-based development workflows and code review practices.

Preferred Skills

• Exposure to software architecture concepts for scalable and reusable model development.
• Experience contributing to architecture discussions and improving modeling methodologies.

Key Skills

Education

Any Graduate