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Staff Verification Engineer

Hays

 

Cambridge, United Kingdom

Posted On: 2 days ago
Experience: 5+ years
Availability: Onsite
Openings: 1
Category: Verification Engineer
Tenure: No Preference/Any
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Description

Lead functional verification for processor-based system designs, ensuring quality standards and project schedules are met.

Responsibilities

  • Write test plans and define verification methodologies across the project lifecycle.
  • Own verification progress and coordinate schedules with project management.
  • Collaborate with architecture, design, modeling, performance analysis, and silicon validation teams.
  • Mentor junior engineers and participate in cross-functional technical reviews.

Required Skills

  • 5+ years of experience in embedded C/C++ based SoC verification environments.
  • Proficiency in SystemVerilog and hardware verification languages.
  • Practical experience verifying processor-based system designs.
  • Strong knowledge of assembly language, preferably ARM.
  • Expertise in shell programming and scripting using Python, Perl, or Tcl.
  • Experience with verification methodologies such as UVM, formal, low power, or emulation.
  • Full lifecycle verification experience: requirements, testbench implementation, and test case development.

Preferred Skills

  • Understanding of Arm system architectures and power-aware/Clock Domain Crossing implementation.
  • Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, or Ethernet.

Education

Any Graduate

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