Description

• will include but not limited to following:C***om layouts for High-Speed C***om Analog/Digital blocks, such as Ring Oscillators, Dividers, Bias Blocks (Voltage & Current references), pre-drivers etc. in TSMC 2nm & 3nm,Independent in debugging and resolving the layout fixes in various verification flowsFlexible to take different tasks in project.
• Execute tasks with minimum supervision/tracking,Have accountability and ownership on blocks & tasks assigned.Completed layout designs, with desired quality, with all specified verification flows cleanCreate and check all relevant design views using sign-off tools.Documentation as per requirement.

Qualifications:
Desired Qualification:

• B.Tech/B.E./MS /M.E. /M tech in Electrical Engineering5-8yrs of hands-on experience in block/module layouts with Cadence Layout design tools, exp in TSMC 5nm or lower node is m***Well versed with layout design and verification tools - Cadence Virtuoso EXL/GXL, Calibre etc.
• Knowledge of scripting (SHELL, PERL, SKILL), excel is good to have. Note: 2nm/3nm TSMC NDA required

Key Skills

Education

Bachelor's degree