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Gold Group Ltd
  Company Profile
Our IT Networks & Comms division handles a wide variety of different roles in different industries and different sectors, many of which come close to areas covered by other divisions, most notably Technology & Engineering. The difference between these two divisions is as follows:

IT Networks & Comms

Installation, management and maintenance of networking & telecommunications products.

Technology & Engineering
Design, development and production of hardware, software & systems products.

  Job Details 

Firmware Engineer - Middlesex

Posted On:  4/28/2021 7:04:21 AM

Firmware Engineer

No. of vacancies:  2
Qualifications:  Bachelors Degree
Essential Skills: 
Not specified
Minimum Total Experience:  3
Job Tenure:  Contract - Corp-to-Corp
Salary Offered:  DOE
Job Location:  Middlesex England United Kingdom

  Job Description
The successful candidate will have experience of writing and implementing VHDL solutions targeted to FPGA's for military products. This experience needs to be sufficient for the candidate to be able to work with minimum supervision. A high level of mathematical skills, including a good understanding of signal processing techniques, will be essential as the role will include the design of algorithms in addition to VHDL coding. It would be desirable for the candidate to have some knowledge of Software Radio Architectures, TDMA techniques, acquisition and tracking algorithms.

Once this project is successfully completed the appointed Firmware Engineer can expect to work on new and challenging future projects.

The key responsibilities of this role are:

* Integration of implemented algorithms and designs onto the target platform.
* Production of high quality design, development and implementation artefacts and documentation for submission to evaluation.
* Support to technical evaluation activities.
* Peer Reviews.

Skills and Experience:

? Proven experience of:
? VHDL design experience for FPGA design.
? ModelSim experience.
? VHDL simulation/test benches.
? FPGA synthesis.
? FPGA timing constraint experience

? Experience of:
? Experience of implementing mathematical or DSP functions in VHDL
? HDL Designer/Author.
? Mentor Precision/Leonardo Synthesis.
? Synplify Synthesis.
? Xilinx Virtex 4/5, Spartan 3/6, place and route, timing closure.
? Creation of testbenches for VHDL Verification

* The successful candidate will be required to gain full security clearance to SC level.
* The candidate must have a high level of professionalism - an understanding of the standards that are expected of them and suitable diligence for documentation and planning.
* The Candidate must have a proven track record of VHDL design and DSP for FPGAs.
* Proven experience of VHDL design for military products with an understanding of the security, reliability and provability required for this area.
* The Candidate must have a high level of mathematical ability, especially numerical analysis and algorithm design.
* The Candidate must have a degree in a numerate discipline. Membership of a professional organisation is also desirable.
* This role may entail occasional travel to Customer Sites and these may be overseas.

  Contact Information
Reference Name (If Any): 

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