Maxonic's mission is to provide human capital that delivers on client’s technology objectives.
Title:
Principal FPGA Design Engineer : Santa Clara, CA
Posted On:
1/4/2021 2:01:12 AM
Designation:
Principal FPGA Design Engineer
No. of vacancies:
1
Qualifications:
Bachelor degree
Minimum Total Experience:
0
Job Tenure:
No Preference/Any
Salary Offered:
DOE
Job Location:
Santa Clara,
CA
United States
Requirements:
At least 7 years' fulltime working experience in logic designs for FPGA or ASIC is required
Proficiency with Verilog, System Verilog, or VHDL, and large complex RTL designs
Experience in highspeed digital design
Detailed module, subsystem, and system level design. Simulation and verification. integration and validation
Python, C or MatLab
BSEE or MSEE
Knowledgeable in any of the following areas:
Ethernet packet processing: basic protocols, Ethernet switches and Ethernet interfaces
Design and implementation of major MAC functions of LTE or WiMAX system
Multicarrier or single carrier modem designs, including FEC's, equalizers and other impairment correction functions
Design and implementation of wireless PHY, including array signal processing functions for MIMO, beamforming, or interference cancellation, in FPGA or ASICs
Implementation of DSP algorithms in FPGA or ASIC, including: digital filtering, resampling control loops, and PLL's
High speed CPU and DDR3 memory interfaces, including PCIe, DMA and high speed serial buses