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Showing 46 - 60 of 77 jobs

Lead FPGA Engineer DBSI Services

• 10+ year of experience

•

No Preference/Any

•

2 opening

Matlab Simulink FPGA Microprocessor Microcontroller

Cedar Rapids, Iowa, USA

30+ days ago

QA Automation and Security Test Architect Intelliswift Software

• 5+ year of experience

•

No Preference/Any

•

2 opening

Qtp Quality Center Jira Dynatrace Chef

Pleasanton, CA, USA

14 days ago

Lead ASIC DFT Engineer VDart

• 5+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

Tcl Perl Python Dft

United States (remote)

30+ days ago

Physical Design (STA) Engineer Haavia Inc

• 10+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

PHYSICAL DESIGN ENGINEER SOC ARCHITECTURE DDR2 SDR LPDDR

Austin, TX, USA

30+ days ago

Design Verification Engineer Ztek Consulting Inc

• 5+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

Embedded Synopsys Cadence Eda

Santa Clara, CA, USA

30+ days ago

Physical Design Engineer HRP Global Technologies

• 4-12 year of experience

•

No Preference/Any

•

1 opening

Tcl Perl Python

Pune, Maharashtra, India

30+ days ago

DFT Engineer CareerNet Technologies Pvt Ltd

• 5+ year of experience

•

No Preference/Any

•

1 opening

System Verilog Tcl Verilog Dft Dft Design

Bengaluru, Karnataka, India

30+ days ago

EDA QA Automation Engineer Experis

• 5+ year of experience

•

No Preference/Any

•

1 opening

Synopsys Icvalidator Klayout Cadence Virtuoso Siemens Calibre C/c++

Albany, NY, USA

30+ days ago

AMS Verification Engineer ACL Digital

• 5+ year of experience

•

No Preference/Any

•

2 opening

Systemverilog Wreal Python Perl Tcl

Bengaluru, Karnataka, India

30+ days ago

Design Verification Engineer Niksperri

• 4+ year of experience

•

No Preference/Any

•

1 opening

C/c++System Verilog verification Scripting Language Shell Makefile

Bengaluru, Karnataka, India

30+ days ago

DFT Engineer Redolent Inc

• 8+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

JTAG IEEE 1500 wrapper MBIST LBIST ATPG

Santa Clara, CA, USA

30+ days ago

Design Engineer Tessolve

• 4+ year of experience

•

No Preference/Any

•

1 opening

Perl Python Shell Tetramax Modus

Bengaluru, Karnataka, India

30+ days ago

Full Chip LVS Lead Zealogics

• 1+ year of experience

•

No Preference/Any

•

1 opening

Tcl Perl Python developing automation

Kochi, Kerala 682001, India

30+ days ago

Emulation Test Engineer UST

• 3+ year of experience

•

No Preference/Any

•

1 opening

Python C C++Debugging Test Automation

Penang, Malaysia

30+ days ago

QA Automation and Security Test Architect Intelliswift Software

• 5+ year of experience

•

No Preference/Any

•

2 opening

Quality Center Jira Qtp Rational Robot Autoit

Pleasanton, CA, USA

30+ days ago

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