278 physical design verification Jobs | iitjobs

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Showing 196 - 210 of 278 jobs

Memory Layout Engineer ACL Digital

• 3+ year of experience

•

No Preference/Any

•

1 opening

CMOS Design Rule Checking (DRC)Digital Circuit Design English Layout Versus Schematic (LVS)

Bengaluru, Karnataka, India

30+ days ago

Data Engineer II CareerNet Technologies Pvt Ltd

• 5+ year of experience

•

No Preference/Any

•

2 opening

Python Aws Pyspark Sql Data Pipeline

Hyderabad, Telangana, India

30+ days ago

Senior Project Manager My3Tech

• 5+ year of experience

•

No Preference/Any

•

2 opening

Waterfall Agile Microsoft Office Visio

Atlanta, GA 30303, USA

30+ days ago

IT Governance Manager VDart

• 10+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

NetDocs Power Desktop

Seattle, WA, USA

30+ days ago

Systems Engineer 4 (Systems Safety)ACL Digital

• 5+ year of experience

•

No Preference/Any

•

1 opening

Analytical Skills Defining Requirements Failure Analysis Fault Tree Analysis Opportunity Management

Seattle, WA, USA

30+ days ago

Senior Lead IP Design Engineer CareerNet Technologies Pvt Ltd

• 12+ year of experience

•

No Preference/Any

•

1 opening

Rtl Design Verilog Systemverilog Data Fabric Architecture Cache Design

Bangalore, Karnataka, India

30+ days ago

Lead ASIC DFT Engineer VDart

• 5+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

Tcl Perl Python Dft

United States (remote)

30+ days ago

Data Engineer III ACL Digital

• 5+ year of experience

•

Contract - Corp-to-Corp

•

1 opening

Aws Python Java Typescript Sql

Bellevue, Washington, USA

30+ days ago

CAD Design Engineer CareerNet Technologies Pvt Ltd

• 8+ year of experience

•

No Preference/Any

•

1 opening

Place And Route Physical Design Fusion Compiler Innovus Python

Hyderabad, Telangana, India

30+ days ago

Physical Design Engineer ACL Digital

• 5+ year of experience

•

Full-time Only

•

1 opening

Python Tcl Perl

Bengaluru, Karnataka, India

30+ days ago

RTL Design Lead CareerNet Technologies Pvt Ltd

• 10+ year of experience

•

No Preference/Any

•

1 opening

Verilog Hdl Rtl Design Ddr High Speed Io Asic Design

Bangalore, Karnataka, India

30+ days ago

Senior Physical Design Engineer ACL Digital

• 5+ year of experience

•

Full-time Only

•

1 opening

Tcl Perl Python

Hyderabad, Telangana, India

30+ days ago

Senior RTL Design Engineer CareerNet Technologies Pvt Ltd

• 12+ year of experience

•

No Preference/Any

•

1 opening

Verilog Soc Design Rtl Design Physical Design Microarchitecture

Hyderabad, Telangana, India

30+ days ago

Memory Layout Engineer ACL Digital

• 5+ year of experience

•

Full-time Only

•

1 opening

Memory Compiler layout development Verification

Noida, Uttar Pradesh, India1

30+ days ago

Senior Staff Engineer Systems CareerNet Technologies Pvt Ltd

• 5+ year of experience

•

No Preference/Any

•

1 opening

3gpp Matlab Wlan Phy C/c++Systemc

Bengaluru, Karnataka, India

30+ days ago