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18 synopsis vcs Jobs | iitjobs

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AMS Verification Engineer ACL Digital

• 5+ year of experience

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N/A

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1 opening

Systemverilog Wreal Python Perl Tcl

Bengaluru, Karnataka, India

UVM Development Engineer Avance Consulting

• 10+ year of experience

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N/A

•

1 opening

Verification Simulation ABV Debugging UVM

Madrid,Spain

DFT Engineer Redolent Inc

• 8+ year of experience

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N/A

•

1 opening

JTAG IEEE 1500 wrapper MBIST LBIST ATPG

Santa Clara, CA, USA

FPGA Verification Engineer Saransh Inc

• 5+ year of experience

•

N/A

•

1 opening

Fpga Design Principles System Verilog Uvm Python Perl

Mountain View, CA, USA

Design Verification Engineer HRP Global Technologies

• 4-12 year of experience

•

N/A

•

1 opening

Systemverilog (sv)Uvm Vhdl

Pune, Maharashtra, India

FPGA Verification Engineer Compunnel

• 3+ year of experience

•

N/A

•

1 opening

Python Perl Vhdl Verilog Cmos

Santa Clara, California, USA

FPGA Verification Engineer Kaizen Soft Solutions

• 5+ year of experience

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N/A

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1 opening

Fpga Uvm Python Perl Fpga Verification

Santa Clara, CA, USA

Lead IP Verification Engineer CareerNet Technologies Pvt Ltd

• 8+ year of experience

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N/A

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1 opening

System Verilog Uvm Verification Digital Design Systemverilog Assertions

Hyderabad, Telangana, India

AMS Verification Engineer ACL Digital

• 3+ year of experience

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N/A

•

1 opening

Python Perl Tcl Shell Scripts

Bengaluru, Karnataka, India

AMS Verification Engineer UST

• 3+ year of experience

•

N/A

•

1 opening

EDA Verilog-AMS Verilog VLSI Xcelium

Hanoi, Hanoi, Vietnam

Design Verification Engineer Niksperri

• 4+ year of experience

•

N/A

•

1 opening

C/c++System Verilog verification Scripting Language Shell Makefile

Bengaluru, Karnataka, India

Emulation Test Engineer UST

• 3+ year of experience

•

N/A

•

1 opening

Python C C++Debugging Test Automation

Penang, Malaysia

SoC Pre-Silicon Verification Engineer Zealogics

• 1+ year of experience

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N/A

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1 opening

SystemVerilog C/C++Perl or Python

Kochi, Kerala, India

SOC/C Verification Engineer Hirexa Solutions

• 7+ year of experience

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N/A

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1 opening

C++Json Python Tcl Makefiles

Cambridge, UK

IP/SS Pre-Silicon Verification Lead Zealogics

• 1+ year of experience

•

N/A

•

1 opening

SystemVerilog C/C++Perl Python

Kochi, Kerala, India